In photolithography process, a finer mask pattern and a high-precision positioning have been desired increasingly. Because of this, a high-performance stepper to transfer a pattern to a wafer has been developed, and therefore the price of stepper is increased. Also, the price of a high-precision mask required with this is increased. Under the circumstances, to reduce the number of masks used to fabricate LSI is most effective for reducing the manufacturing cost and shortening TAT(turn-around-time).
A conventional standard CMOS fabricating method (hereinafter referred to as `first prior art`) needs eight masks until forming aluminum wiring. In this regard, a CMOS process to reduce the number of masks has been proposed (hereinafter referred to as `second prior art`). In this method using the counter-doping, the number of masks to fabricate CMOS can be reduced by two as compared with the standard method of the first prior art.
However, in the second prior art, the implantation for forming p-MOS channel region is conducted under the condition that cancels the impurity profile of the n-MOS channel region implanted earlier. Therefore, the depth of the p-MOS channel region from the surface becomes greater than that of the n-MOS channel region. As a result, the concentration of the channel region is increased at the junction with the source-drain region of the p-MOS transistor, and the junction capacitance is thereby increased.
Furthermore, the SDBF.sub.2, implantation for forming the p-MOS source-drain region is conducted under the condition that cancels the impurity profile of SDAs implanted earlier. Therefore, the junction depth of the p-MOS source-drain region is formed to be greater than that of n-MOS. As a result, p-MOS is subject to the short-channel effect more possibly than n-Mos and therefore a fine transistor with a short gate length is difficult to fabricate.
As described above, in the second prior art, though the number of masks is reduced, the p-MOS transistor must have an increased source-drain junction capacitance and a fine structure is difficult to fabricate due to the short-channel effect. Thus, the performance of the p-MOS transistor formed in the second prior art is reduced that formed in the first prior art.